Investigating wide variety of problems in VLSI design, techniques for the design of energy efficient systems, circuits and systems for DSP and communications, digitally intensive/assisted RF, analog, and mixed-signal circuits, efficient control in power electronics, Nano-electromechanical (NEM) relays based digital and mixed-signal circuits, computer arithmetic, reconfigurable circuits, and application-specific architectures
Courses related to digital circuits, VLSI Design, introduction to power electronics
S. Singh, S. Bhoj, D. Balasubramanian, T. Nagda, D. Bhatia and P. T. Balsara:
"Network Interface for NoC Based Architecture," International Journal of
Electronics, Vol. 94, Issue 5, May 2007, pp. 531-547. 2007 - Publication
E. Atalla, I. Bashir, P. T. Balsara, K. Kiasaleh and R. B. Staszewski: "A
Practical Step Forward Toward Software-Defined Radio Transmitters,"
Proceeding of the 6th IEEE Dallas Circuits and Systems Workshop (DCAS '07),
Dallas, Texas. Nov. 15-16, 2007, pp. 1-4 2007 - Publication
R. Staszewski, & P. T. Balsara: "All-Digital PLL with Ultra Fast Settling,"
IEEE Transactions on Circuits and Systems-II, vol. 54, No. 2, Feb. 2007, pp.
181-185. 2007 - Publication
C. Singh, S. Honnavara Prasad and P.T. Balsara: "VLSI Architecture for Matrix
Inversion using Modified Gram-Schmidt based QR Decomposition,"
Proceedings of the 20th IEEE International Conference on VLSI Design (VLSI
'07), Bangalore, India. Jan. 6-10, 2007, pp. 836-841 2007 - Publication
C. K. Singh, N. Al-Dhahir and P.T. Balsara: "Effect of Word-length Precision
on the Performance of MIMO Systems," Proceedings of the IEEE International
Conference on Circuits and Systems (ISCAS), New Orleans, LA, May 27-30,
2007. pp. 2598-2601. 2007 - Publication
I. Elahi, K. Muhammad & P. T. Balsara: "I/Q Mismatch Compensation Using
Adaptive Decorrelation in a Low-IF Receiver in 90nm CMOS Process," IEEE
Journal on Solid-State Circuits, vol. 41, No. 2, February 2006, pp. 395-404. 2006 - Publication
R. Staszewski, S. Vemulapalli, P. Vallur, J. Wallberg & P. T. Balsara: "1.3V
20ps Time-to-Digital Converter in 90nm CMOS," IEEE Transactions on
Circuits and Systems-II, vol. 53, No. 3, March 2006, pp. 220-224. 2006 - Publication
I. Elahi, K. Muhammad & P. T. Balsara: "IIP2 and DC Offsets in the Presence
of Leakage at LO Frequency," IEEE Transactions on Circuits and Systems-II,
vol. 53, No. 8, Aug. 2006, pp. 647-651. 2006 - Publication
V. Ramakrishnan and P.T. Balsara: "A Wide-Range High-Resolution Compact
CMOS Time to Digital Converter," Proceedings of the 19th IEEE International
Conference on VLSI Design (VLSI '06), Hyderabad, India, January 3-7, 2006, pp
197-202. 2006 - Publication
R. Konar, R. Bharadwaj, D. Bhatia and P.T. Balsara: "Exploring Logic Block
Granularity in Leakage Tolerant FPGAs," Proceedings of the 19th IEEE
International Conference on VLSI Design (VLSI '06), Hyderabad, India, January
3-7, 2006, pp. 754-757. 2006 - Publication
Researchers in UT Dallas’s Erik Jonsson School of Engineering and Computer Science invented a control method and specialized algorithms that allow power converters to be more useful in power environments requiring high levels of stability and precision, or that must manage varying levels of voltage. The University licensed the technology to Cirasys for further development and commercialization. Dr. Louis Hunt, professor emeritus of engineering, is chief scientist at Cirasys and a co-inventor of the technology with adjunct professor Dr. Robert J. Taylor (PhD’04). Dr. Dinesh Bhatia and Dr. Poras Balsara, both professors of electrical engineering, are involved in the research and development.
The integrated circuit design program at UT Dallas is turning heads: Three of the program’s papers were recently ranked among the top 50 downloads from the Institute of Electrical and Electronics Engineers.
The University’s integrated circuit design program has expanded in recent years to more than a dozen professors and several dozen graduate students in the Department of Electrical Engineering
“This says the work we’re doing is highly relevant and top-quality,” said Dr. Kenneth K. O, a professor of electrical engineering and director of the Texas Analog Center of Excellence
(TxACE) at UT Dallas. “And it’s rare that one institution has this many papers in one research area at once.”
Electrical engineering faculty Poras Balsara (left) and Kamran Kiasaleh hold the circuit board containing the software-defined radio technology that their team is developing. Other members of the team are (second row, from left) graduate students Xiaojiang Tian, Jay Shah and Ali Montazeri, and (third row, from left) grad student Gaurav Sureka, undergraduate Allen Webb and grad student Liu Zhengjie. Team members not pictured are grad student Essam Atalla, former grad student Beilei Zhang and associate professor of electrical engineering Dinesh Bhatia.
The federal government has extended a contract with researchers at The University of Texas at Dallas to develop wireless communications technology that can easily skip from one standard to another, enabling ubiquitous connectivity.
The technology is being developed for emergency workers, but it’s expected to find eventual consumer applications as well.
Known as software-defined radio, the secret to the technology lies in software modules that run on an all-purpose processor. That differs from the usual approach, in which cell phones are hardwired to work with just one type of signal.
Dr. Poras Balsara, a professor and associate chair of electrical engineering in the Erik Jonsson School of Engineering and Computer Science at The University of Texas at Dallas (UTD), along with his doctoral student, Ramakrishnan Venkatasubramanian, received second place for their design paper at the joint meeting of 19th Institute of Electrical and Electronics Engineers (IEEE) International Conference on VLSI Design and 5th International Conference on Embedded Systems and Design held recently in India.