Carl Sechen

Professor - Electrical Engineering
Tags: Electrical Engineering Computer Engineering

Professional Preparation

Ph.D. - Electrical Engineering
University of California, Berkeley - 1987
M.S. - Electrical Engineering
Massachusetts Institute of Technology - 1977
B.E.E. - Electrical Engineering
University of Minnesota - 1975

Research Areas

Research Interests
My research interests center primarily on the design and computer-aided design of integrated circuits. I have ongoing projects in high-speed, energy-efficient DSP block design, low-power (sub-threshold) highdefinition video decoder design, as well as area-efficient and reliable embedded DRAM and SRAM design. Another key research project is cell sizing/selection for global power minimization in digital integrated circuits, including leakage power control, as well as variational sensitivity reduction and yield enhancement. Cell library optimization is also addressed. I am also working on time-to-digital conversion, crystalfree high-precision oscillator design, and all-digital analog-to-digital converter design.


X. Guo and C. Sechen, High Throughput Divider Using Output Prediction Logic, Proc. PRIME (Ph.D. Research in Microelectronics) Conf., July 25-28, 2005, Lausanne, Switzerland. 2005 - Publication
M. Vujkovic, D. Wadkins and C. Sechen, Efficient Post-Layout Power-Delay Curve Generation, Prof. 15th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 21-23 September 2005, Leuven, Belgium. In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, Series: Lecture Notes in Computer Sci-ence, Vol. 3728 Paliouras, Vassilis; Vounckx, Johan; Verkest, Diederik (Eds.) 2005, XV, 753 p., Softcover ISBN: 3-540-29013-3. 2005 - Publication
Don Bouldin, Warren Snapp, Paul Haug, Dave Sunderland, Roger Brees, Carl Sechen, and Wayne Dai, Automated Design of Digital Signal Processing ASICs, IEEE Circuits and Devices, vol. 20, n. 4, pp. 17-21, July 2004. 2004 - Publication
J. Ciric and C. Sechen, Efficient Canonical Form for Boolean Matching of Complex Functions in Large Libraries, IEEE Trans. on Computer-Aided Design, Vol. 22, No. 5, May 2003, pp. 535-544. 2003 - Publication
G. Hoyer, G. Yee and C. Sechen, Locally-Clocked Pipelines and Dynamic Logic, IEEE Transactions on VLSI Systems, Vol. 10, No. 1, February 2002, pp. 58-62. 2002 - Publication


The University of Texas at Dallas [2005–Present]
University of Washington [1999–2005]
Associate Professor
University of Washington [1992–1999]
Associate Professor
Yale University [1990–1992]
Assistant Professor
Yale University [1986–1990]

Additional Information

Honors and Awards
  • Fellow, Institute of Electrical and Electronics Engineers, 2002
  • Outstanding Research Advisor Award, Department of Electrical Engineering, University of Washington, 2002
  • Best Project Award, NSF Center for the Design of Digital and Analog ICs (CDADIC), 2002
  • SRC Inventors Recognition Award, Semiconductor Research Corporation, 2001
  • SRC Technical Excellence Award, Semiconductor Research Corporation, 1994
  • SRC Inventor's Recognition Award, Semiconductor Research Corporation, 1988